As integrated circuits (IC) becomes faster and more complex, the number of input/output (I/O) pads increases drastically. In order to accommodate the complexity, one approach is to reduce the size and spacing of pads as much as possible, and another approach is to make variation on pad format such as an area-array format which has been proposed for integrated circuits with large number of inputs and outputs. The area-array pad format has been widely accepted and it may replace the traditional periphery format in the future. The probing test of such kind of chips using conventional needle probe cards, however, is very difficult because of the area-array format as well as the reduction in pad size and spacing.
The traditional approach of using a conventional probe card to interface a chip introduces parasitic capacitance and inductance that make it impossible to test the chip at full speed. Therefore, chips that are functional but do not meet speed requirements are usually packaged and then scraped later. This has become a severe problem as the operational speed of circuit devices continues to increase. Scraping and reworking finished systems that do not meet speed requirements greatly increases manufacturing cost. Therefore, it has become essential to test circuit devices such as those used in multi-chip modules (MCMs) at full speed. Furthermore, the output drivers of an advanced circuit device are designed with a smaller size in anticipation of reduced parasitic effects between chips. Hence, they are less effective in driving the conventional probe card and the tester. An accurate sort of good chips at the wafer level can save significant packaging costs. In order to provide a better screening process at the wafer level, it is necessary to use probe cards that have higher resolutions and allow testing at higher speeds. The probe cards also have to place less loading to the output drivers of the device under test.
An electronic membrane prober (MP) is a membrane style probe card fabricated from a silicon wafer with typical integrated circuit and micromachining technologies. The MP is capable of providing a very large number of probe tips in any format (can be greater than 1000), including area-array prober pad format, and is designed to satisfy the requirements of high speed and high resolution wafer-level testing.
The membrane is a thin, free-handling and low stress layer of silicon, silicon dioxide, silicon carbide, silicon nitride or polyimide. FIG. 1 shows a conceptual design of the MP. The probe lines are aluminum and the probe tips are tungsten. The probe card is fabricated with conventional integrated circuit processing techniques that are well established. In addition, more functionality can be added to the prober because active test circuitry can also be placed on the MP.
The membrane film of an MP provides the mechanical support for the probe lines and tips as well as the alignment of the probe card to the wafer under test if the membrane film is transparent. A membrane probe card can provide a very large number of probe tips in any area-array format. If the test circuitry is formed on the MP, the close proximity of the test circuitry greatly improves the electrical performance of the probing test. As compared to the conventional needle probe card, it has the advantage of decreased transit time, reduced loading effect and less signal attenuation. Consequently, the MP can meet the wafer-level at-speed test requirements that are not achieved by the conventional epoxy needle prober.
As the name indicates, MCM in general refers to assemblies of large active devices on an interconnected (signal/power traces) structure and may contain relatively large systems or subsystems. For cost effective reason, the open/short (O/S) test of the signal traces on the MCM substrate should be completed before the electronic components are bonded on them. A conventional solution is to measure the parasitic capacitance of each signal line by maneuvering one or more needle-type probers above the substrate plane.
Mainly due to the slow mechanical motion, it takes many minutes to complete an O/S test for one MCM substrate. In addition to the drawback of long test time, the test speed and the accuracy may also be affected by the long test probes connected to an external instrument. For example, using an one-needle prober with an average test speed of 1 trace per second, it takes 2.3 hours to complete an O/S test for a 6" silicon wafer on which there are 12 MCM substrates each having 700 signal traces (test points). Therefore, there is a strong need for an alternative O/S test methodology to shorten the test time and improve the test accuracy.